Nonvolatile memory that can store data even when not powered is currently used for portable electronics such as smart phones, tablets, and laptop computers. Flash memory is a dominant technology in this field, but its slow writing and erasing speed has led to extensive research into a next-generation nonvolatile memory called Phase-Change Random Access Memory (PRAM), as PRAM’s operating speed is 1,000 times faster than that of flash memory.
PRAM uses reversible phase changes between the crystalline (low resistance) and amorphous (high resistance) state of chalcogenide materials, which corresponds to the data “0” and “1,” respectively. Although PRAM has been partially commercialized up to 512 Mb by Samsung Electronics Co., Ltd., its writing current should be decreased by at least one-third of its present level for the mass production of mobile electronics applications.
A team of Professors Keon Jae Lee and Yeon Sik Jung in the Department of Materials Science and Engineering at KAIST has developed phase-change memory with low power consumption (below 1/20th of its present level) by employing self-assembled block copolymer (BCP) silica nanostructures. Their work was published under the title “Self-Assembled Incorporation of Modulated Block Copolymer Nanostructures in Phase-Change Memory for Switching Power Reduction” in the March issue of ACS Nano, a monthly peer-reviewed scientific journal.
BCP is the mixture of two different polymer materials, which can easily create self-ordered arrays of sub-20 nm features through simple spin-coating and plasma treatments. PRAM can lower switching power consumption by making the contact area smaller between the heating layer and phase change materials. Professor Lee’s team successfully decreased the size of the contact area and the level of power consumption by incorporating self-assembled silica nanostructures on top of conventional phase-change materials. Interestingly, these self-assembled nanomaterials are able to reduce power much more than expected with localized nano-switching mechanisms.
Professor Keun-Jae Lee said, “This is a very good example that self-assembled, bottom-up nanotechnology can actually enhance the performance of electronic devices. We also achieved a significant power reduction through a simple process that is compatible with conventional device structures and existing lithography tools.”
The research team is currently investigating self-assembled BCP applications for resistive random access memory and flexible electronic devices.